Week In Review: Auto, Security, Pervasive Computing - SemiEngineering

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Intel Ice Lake security; Cruise tests go driverless in SF; Cadence and TriEye SWIR automotive sensor; Samsung, Synposys automotive reference flow.

Security
Intel announced new security features for its code-named Ice Lake CPU, according to a story in SecurityWeek. The 10nm-based Xeon Scalable will have SGX trusted execution environment and several new features for memory encryption, firmware resilience, and cryptographic performance acceleration. The new Total Memory Encryption (TME) feature in the CPU will encrypt access to memory.

Automotive
Renault debuted a slew of electric vehicles, one of which is an electric concept car that has some mini-SUV traits, designed for medium sized family, but the definitive production model is due out in 2021, reports Reuters. The car, called Megane eVision, will be built on an EV platform designed by an alliance of Nissan, Renault, and Mitsubishi. The modular CMF-EV platform, developed by a team of French and Japanese engineers, allows batteries to be placed vertically and horizontally. Also batteries can be structural — built into the car structure.

Cruise is now one of the five companies that have permit to test driverless cars sans driver in California. AUTOX TECHNOLOGIES, Cruise, NURO, WAYMO, and ZOOX have driverless car permits in California. Cruise’s CEO Dan Ammann says, “before the end of the year, we’ll be sending cars out onto the streets of SF — without gasoline and without anyone at the wheel.”

Automotive chip and systems design
Cadence Spectre X Simulator helped shorten the design cycle of TriEye’s CMOS-based short-wave infrared (SWIR) image sensor, helping the fabless semiconductor company improve the sensor’s performance to meet ISO requirements. The SWIR image sensor can detect road hazards in low light and night-time situations, where other advanced driver-assistance system (ADAS) cameras have difficulty. The technology has been used in defense and aerospace for decades. TriEye also used Cadence’s Virtuoso ADE Assembler and Virtuoso ADE Verifier to test many different power, voltage, and temperature (PVT) conditions and run verification plans. TriEye is a startup based in Israel.

Synopsys and Samsung Foundry released a reference flow for Samsung’s 14LPU process technology that will streamline automotive ASIL D-complaint SoC designs used in a vehicle’s safety-critical systems. The reference flow has failure modes and effects analysis (FMEA) failure modes effects and diagnostic analysis (FMEDA), and unified fault campaign management. Synopsys also has functional safety processor IP for automotive grade CPUs.

Hyperscale, automotive, 5G, mil/aero design tools
Used for verifying complex automotive, hyperscale, mobile, and consumer SoCs, Cadence has introduced a new System-Level Verification IP (System VIP) platform of tools and libraries. This chip-level design tool includes an SoC testbench generator, pre-defined traffic test libraries that include PCIe and NVMe, a system performance analyzer to see what is happening in subsystems and interconnects, and a verification scoreboard. Designers can export the tests created in System VIP to other simulation, emulation, and prototyping engines, according to Cadence’s press release.

Used for diagnosing EMI system design issues for automotive, hyperscale, mobile, and mil/aero SoCs, Cadence also released its Cadence Clarity 3D Transient Solver. Nix the anechoic test chamber — at least in the early prototype phase. This massively parallel matrix solver technology can simulate large designs and find EMI issues there, which can cut down on prototypes that get retested in these expensive chambers.

5G
The wide bandgap material GaN (gallium nitride) is increasingly used in 5G RF chips, and Veeco reports that A-Pro Semicon has adopted Veeco’s Propel HVM MOCVD system for GaN-based chip production.

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